The present invention relates to capacitive transimpedance amplifiers, and more particularly, to capacitive transimpedance amplifiers suited for reading capacitive sensors such as CMOS image sensors.
The present invention can be more easily understood in the context of arrays of CMOS image sensors. However, it will be apparent to those skilled in the art from the following discussion that the present invention may be applied to other circuitry in which the charge on a capacitor or array of capacitors must be measured.
In principle, CMOS image sensors provide a number of advantages over CCD image sensors. The CMOS yields are significantly better than those of the CCD fabrication process. In addition, the minimum noise levels achievable with CMOS-based sensors are substantially lower than those that can be obtained with CCDs.
The uses for CMOS image sensing arrays have been limited, however, by so called xe2x80x9cfixed pattern noisexe2x80x9d (FPN). Each image sensor in a CMOS array typically includes an amplifier for converting the small amount of charge stored on the parasitic capacitance of the imaging element to a voltage or current. Consider an array of such imaging elements. To provide a high quality image, each element must have the same response characteristics. Consider an imaging array in which the amplifier generates a voltage that is linearly related to the amount of light that fell on the imaging element. Each imaging element can be characterized by an offset and gain. That is, the voltage, Vi, generated by the ith amplifier is related to the offset, Oi, for that element and the gain, Gi, by
xe2x80x83Vi=Oi+GiI,xe2x80x83xe2x80x83(1)
where I is the light incident on the ith element since the last time the imaging element was reset. To provide a high quality image all of the Oi must be the same, i.e., Oi=O, and all of the gains, Gi must be the same, i.e., Gi=G. The extent to which Oi is different from O is referred to as the offset FPN of the array, and the extent to which Gi is different from G is referred to as the gain FPN of the array. It should be noted that these noise values are constant for any given array. For any given pixel, Gixe2x88x92G does not change in time.
In addition to the offset and gain FPN, there is a third type of noise, referred to as the temporal noise, which reflects the variation of Vi from measurement to measurement. This noise is related to the various shot, thermal, and 1/f noise sources in the image sensor.
As CMOS sensors are pushed to ever-lower light levels, the relative magnitude of the gain and offset FPN increases leading to degraded images. To provide the high gain levels needed at low light levels without introducing additional temporal noise, capacitive transimpedance amplifiers are used. The gain of such amplifiers depends on the ratio of the capacitance of the sensor to that of the capacitance of the feedback loop in the amplifier. Hence, to obtain high gain, the feedback capacitor must be much smaller than the sensor capacitor. The variations in these capacitors determines the gain FPN of the array. Hence, the dimensions of the capacitors must be held to very tight tolerances to prevent the introduction of gain FPN.
A capacitor is constructed by overlapping two metal electrodes that are separated by a dielectric layer. For any given fabrication process, there is a point at which the ability to control the degree of overlap and size of the electrodes becomes a problem. In general, one would like to have the capacitance of the photodiode be as small as possible so that the charge sensitivity will be as high as possible. Hence, the photodiode capacitance is set to be just big enough to assure that the capacitance does not vary substantially among the imaging elements. However, if this is the case, the feedback capacitor, which must have a small fraction of the capacitance of the photodiode, will be too small to be reliably constructed.
Broadly, it is the object of the present invention to provide an improved capacitive sensor.
It is a further object of the present invention to provide a capacitive sensor that has reduced gain FPN relative to prior art devices.
It is a still further object of the present invention to provide a capacitive sensor that has reduced temporal reset noise.
These and other objects of the present invention will become apparent to those skilled in the art from the following detailed description of the invention and the accompanying drawings.
The present invention is an amplifier for measuring the charge stored on a source capacitor having a capacitance Cpd. The amplifier includes an opamp having a signal input, reference input and output; the first terminal of the source capacitor is connected to the signal input. The amplifier includes a reset switch for shorting the signal input and the output of the opamp, and a capacitive network. The capacitive network connects the signal input and the output of the opamp, and provides a capacitance of CT between the signal input and the output of the opamp wherein CT less than Cpd. The capacitive network is constructed from a plurality of component capacitors. Preferably each component capacitor has a capacitance greater than or equal to Cpd. In one embodiment of the invention, the capacitive network includes first, second, and third component capacitors, each capacitor having first and second terminals. The first terminal of the first capacitor is connected to the output of the opamp; the second terminal of the first capacitor, the first terminal of the second capacitor, and the first terminal of the third capacitor are connected together at a first common node, the second terminal of the third capacitor is connected to the signal input of the opamp, and the second terminal of the second capacitor is connected to the second terminal of the parasitic capacitor. The capacitive network also includes a first network switch for connecting the first common node to the output of the opamp.